Gate spacers etching of Si₃N₄ using cyclic approach for 3D CMOS devices

In this work, we optimize a CH3F/O2/He/SiCl4 chemistry to etch silicon nitride gate spacers for 3D CMOS devices in 300 mm inductively coupled plasma reactor. The has high directivity and selectivity Si SiO2. A cyclic approach, which alternates with CH2F2/O2/CH4/He plasma, is investigated. Using quasi situ x-ray photoelectron spectroscopy ellipsometry measurements, etching mechanisms are proposed explain the results obtained. As result of process optimization, vertical profile small critical dimension loss 3 nm as well complete removal on sidewalls active area obtained patterns, confirming advantages approach.